High-performance Mass Memory Units are a key factor to process the vast amount of data of todays and upcoming space missions. In this work we present a high-performance but reliable mass memory unit for next generation satellite systems and deep space explorer missions. Peak data rates of up to 20 Gbps are targeted. To this end, a novel architectural hardware design is necessary, comprising high-speed interfaces as well as two FPGA devices for managing the I/O and memory device access. In order to achieve maximum storage capacities of up to 48 TBit, suitable FLASH-based memory devices must be selected and qualified, leading to a comprehensive up-screening campaign that needs to be carried out, too.