Balancing task- and data-level parallelism to improve performance and energy consumption of matrix computations on the Intel Xeon Phi

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Erscheinungsjahr:
2015
Medientyp:
Text
Schlagworte:
  • Energy efficiency
  • Energy utilization
  • Power capping
  • Data Storage Equipment
  • Program Processors
  • Applications
  • Energy efficiency
  • Energy utilization
  • Power capping
  • Data Storage Equipment
  • Program Processors
  • Applications
Beschreibung:
  • The emergence of new manycore architectures, such as the Intel Xeon Phi, poses new challenges in how to adapt existing libraries and applications to this type of systems. In particular, the exploitation of manycore accelerators requires a holistic solution that simultaneously addresses time-to-response, energy efficiency and ease of programming. In this paper, we adapt the SuperMatrix runtime task scheduler for dense linear algebra algorithms to the many-threaded Intel Xeon Phi, with special emphasis on the performance and energy profile of the solution. From the performance perspective, we optimize the balance between task- and data-parallelism, reporting notable results compared with Intel MKL. From the energy-aware point of view, we propose a methodology that relies on core-level event counters and aggregated power consumption samples to obtain a task-level accounting for the energy. In addition, we introduce a blocking mechanism to reduce power and energy consumption during the idle periods inherent to task parallel executions. (C) 2015 Elsevier Ltd. All rights reserved.
Lizenz:
  • info:eu-repo/semantics/restrictedAccess
Quellsystem:
Forschungsinformationssystem der UHH

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oai:www.edit.fis.uni-hamburg.de:publications/aef7e797-adfe-4738-988a-dadb87bf618c