53 Einträge gefunden

1. Hybrid SORN support vector machine classifier : a hardware implementation of the RBF kernel

   1. Hülsmeier, Nils
   2. Bärthel, Moritz
   3. Rust, Jochen
   4. Paul, Steffen

   2025 - ReposIt
2. Adaptive interval segmentation : an algorithmic approach for optimal SORN datatypes

   1. Hülsmeier, Nils
   2. Bärthel, Moritz
   3. Rust, Jochen
   4. Paul, Steffen

   2024 - ReposIt
3. Quantitative evaluation on the limits of SORN arithmetic hardware circuits

   1. Bärthel, Moritz
   2. Hülsmeier, Nils
   3. Rust, Jochen
   4. Paul, Steffen

   2024 - ReposIt
4. Exploiting SORN-arithmetic for efficient cross correlation in low-complexity FPGAs

   1. Rust, Jochen
   2. Henkel, Marvin
   3. Hülsmeier, Nils
   4. Bärthel, Moritz
   5. Paul, Steffen

   2024 - ReposIt
5. Fused three-input SORN arithmetic

   1. Bärthel, Moritz
   2. Yuxing, Chen
   3. Hülsmeier, Nils
   4. Rust, Jochen
   5. Paul, Steffen

   2023 - ReposIt
6. Hybrid SORN hardware accelerator for support vector machines

   1. Hülsmeier, Nils
   2. Bärthel, Moritz
   3. Rust, Jochen
   4. Paul, Steffen

   2023 - ReposIt
7. On the implementation of edge detection algorithms with SORN arithmetic

   1. Bärthel, Moritz
   2. Hülsmeier, Nils
   3. Rust, Jochen
   4. Paul, Steffen

   2022 - ReposIt
8. Improving the precision of SORN arithmetic by introducing fused operations

   1. Bärthel, Moritz
   2. Rust, Jochen
   3. Gustafson, John
   4. Paul, Steffen

   2022 - ReposIt
9. Hybrid SORN implementation of k-nearest neighbor algorithm on FPGA

   1. Hülsmeier, Nils
   2. Bärthel, Moritz
   3. Karsthof, Ludwig
   4. Rust, Jochen
   5. Paul, Steffen

   2022 - ReposIt
10. Hardware architecture of a decentralized massive MIMO equalizer based on Gauss-Seidel Detection

    1. Karsthof, Ludwig
    2. Seidel, Pascal
    3. Milautzki, Raik
    4. Rust, Jochen
    5. Paul, Steffen

    2021 - ReposIt
11. Hardware implementation of a latency-reduced sphere decoder with SORN preprocessing

    1. Bärthel, Moritz
    2. Knobbe, Simon
    3. Rust, Jochen
    4. Paul, Steffen

    2021 - ReposIt - frei zugänglich
12. The HPDPU : high-performance data processing unit for future satellite communication systems

    1. Rust, Jochen
    2. Hao, Mingjie
    3. Karsthof, Ludwig
    4. Paul, Steffen
    5. Hashem, Elias
    6. Kulau, Ulf

    2021 - ReposIt
13. A high-performance data processing unit for next generation satellite transceivers

    1. Rust, Jochen
    2. Hao, Mingjie
    3. Karsthof, Ludwig
    4. Paul, Steffen
    5. Hashem, Elias
    6. Kulau, Ulf

    2020 - ReposIt
14. Ultra low latency implementation of robust channel estimation and equalization for industrial wireless communication systems

    1. Karsthof, Ludwig
    2. Hao, Mingjie
    3. Rust, Jochen
    4. Paul, Steffen

    2020 - ReposIt
15. A hardware generator for SORN arithmetic

    1. Rust, Jochen
    2. Bärthel, Moritz
    3. Seidel, Pascal
    4. Paul, Steffen

    2020 - ReposIt
16. FPGA prototyping of a high-resolution TerraSAR-X Image Processor for iceberg detection

    1. Gregorek, Daniel
    2. Guenzel, Dominik
    3. Rust, Jochen
    4. Paul, Steffen
    5. Velotto, Domenico
    6. Imber, James
    7. Tings, Bjorn

    2020 - ReposIt
17. SORN arithmetic for MIMO symbol detection : exploration of the type-2 unum format

    1. Bärthel, Moritz
    2. Seidel, Pascal
    3. Rust, Jochen
    4. Paul, Steffen

    2020 - ReposIt
18. Adaptive bivariate function generation based on chebyshev-polynomials

    1. Rust, Jochen
    2. Seidel, Pascal
    3. Paul, Steffen

    2020 - ReposIt
19. Combining fixed-point and SORN arithmetic in a MIMO BPSK-symbol detection architecture

    1. Bärthel, Moritz
    2. Rust, Jochen
    3. Paul, Steffen

    2020 - ReposIt
20. Application-specific analysis of different sorn datatypes for unum type-2-based arithmetic

    1. Bärthel, Moritz
    2. Rust, Jochen
    3. Paul, Steffen

    2020 - ReposIt